1. Field of the Invention
The invention relates to a method and apparatus for optimizing the operation of an interconnect in a computer system. Specifically, the method and apparatus reduce unnecessary traffic on an interconnect system by pushing virtual address translation data to the endpoints of the interconnect system.
2. Background
Computer systems have internal communication systems to transfer data. These internal communication systems include a set of interconnects. The interconnects provide data communication between the components of the system. However, these interconnects can also be bottlenecks for system performance if they are not able to keep up with the demands of the components of the system.
The peripheral component interconnect (PCI) system is a standard system for providing communication between a set of peripheral components and the other components of the computer system including the processor and the main memory. The PCI system has been periodically revised to increase its speed and throughput. The updated systems are known as PCI-X and the PCI express (PCIe) system. The PCI-X system is a shared bus with improved system performance over the original PCI system.
The PCIe system is a set of point-to-point interconnects with further improvements in performance. The PCIe system includes a root controller or port in a controller hub. The root controller is responsible for transmitting and receiving data from other components and placing it on the appropriate PCIe interconnect. The root port also receives data and requests from the peripheral components on the PCIe system and passes these data and requests to the appropriate component.
The peripheral components make direct memory access (DMA) requests. DMA requests are to access areas of main memory to retrieve or write data. Peripheral components typically have a virtual address range assigned by an operating system that they are allowed to access and write to. The peripheral components request and retrieve mapping data that allows them to determine the physical addresses, corresponding to the virtual addresses used by the component, of the memory location for a DMA transaction. However, the requests for translation data create excessive traffic over the PCIe system degrading performance. Instead of servicing actual accesses to memory, the PCIe system must service address translation requests thereby diminishing the throughput and speed of the PCIe system.